From f206da8e6af492ba0e74501bf744dce9f49d7938 Mon Sep 17 00:00:00 2001 From: "kaf24@scramble.cl.cam.ac.uk" Date: Sat, 15 Mar 2003 19:00:43 +0000 Subject: [PATCH] bitkeeper revision 1.134 (3e73785bvvEA4DeuiBLGiBTz3Ij6xw) config.h, entry.S: Fix access to irq_stat in Xen assembly code. It assumed 16 bytes for teh structure, but it's actually padded to 64 bytes. --- xen/arch/i386/entry.S | 8 +++----- xen/include/xeno/config.h | 7 ++++++- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/xen/arch/i386/entry.S b/xen/arch/i386/entry.S index 436d12a8ff..346784a407 100644 --- a/xen/arch/i386/entry.S +++ b/xen/arch/i386/entry.S @@ -194,8 +194,6 @@ ENTRY(ret_from_newdomain) * 2. We cannot recursively call HYPERVISOR_multicall, or a malicious * caller could cause our stack to blow up. */ -stringstring: - .asciz "%08x %08x %08x %08x %08x %08x %d\n" do_multicall: popl %eax cmpl $SYMBOL_NAME(ret_from_hypervisor_call),%eax @@ -273,14 +271,14 @@ ret_from_hypervisor_call: test_all_events: mov PROCESSOR(%ebx),%eax - shl $4,%eax # sizeof(irq_cpustat) == 16 + shl $4,%eax # sizeof(guest_trapo_bounce) == 16 lea guest_trap_bounce(%eax),%edx cli # tests must not race interrupts xorl %ecx,%ecx notl %ecx test_softirqs: mov PROCESSOR(%ebx),%eax - shl $4,%eax # sizeof(irq_cpustat) == 16 + shl $6,%eax # sizeof(irq_cpustat) == 64 test %ecx,SYMBOL_NAME(irq_stat)(%eax,1) jnz process_softirqs test_hyp_events: @@ -422,7 +420,7 @@ kill_domain_fixup3: ALIGN process_guest_exception_and_events: mov PROCESSOR(%ebx),%eax - shl $4,%eax # sizeof(irq_cpustat) == 16 + shl $4,%eax lea guest_trap_bounce(%eax),%edx testb $~0,GTB_FLAGS(%edx) jz test_all_events diff --git a/xen/include/xeno/config.h b/xen/include/xeno/config.h index 3687748a0b..9dbceda88e 100644 --- a/xen/include/xeno/config.h +++ b/xen/include/xeno/config.h @@ -39,7 +39,12 @@ #define HZ 100 -/* Just to keep compiler happy. */ +/* + * Just to keep compiler happy. + * NB. DO NOT CHANGE SMP_CACHE_BYTES WITHOUT FIXING arch/i386/entry.S!!! + * It depends on size of irq_cpustat_t, for example, being 64 bytes. :-) + * Mmmm... so niiiiiice.... + */ #define SMP_CACHE_BYTES 64 #define NR_CPUS 16 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) -- 2.30.2